Debugging Signal Corruption in Scan Chain Using Phase Laser Voltage Imaging

2017 ◽  
Author(s):  
G. Ranganathan ◽  
V.K. Ravikumar ◽  
S.L. Phoa ◽  
C. Nemirow ◽  
N. Leslie
Keyword(s):  
Case Studies ◽  
Duty Cycle ◽  
Second Harmonic ◽  
Harmonic Mapping ◽  
Fault Isolation ◽  
Voltage Imaging ◽  
Scan Chain ◽  
Lock In

Abstract Laser Voltage imaging (LVI) is an established and widely used technique for isolating scan chain failures, especially those that are stuck-at a particular state. Enhancements such as second harmonic mapping have been beneficial in detecting a fault that is not stuck, but caused a shift in duty-cycle of the injected signal. In this paper, we describe Phase LVI which is constructed by integrating a lock-in amplifier as an enhancement to LVI for studying the relative phases between scan flops. Additionally we showcase case studies of successful fault isolation using phase LVI, where traditional LVI techniques were not successful.

Unlocking Novel FA Case Studies Using a Lock-in Amplifier

2020 ◽  
Author(s):  
Sukho Lee ◽  
Marc van Veenhuizen ◽  
Paolo Navaretti ◽  
Gaia Donati
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Micro Electro Mechanical System ◽  
Fault Isolation ◽  
Optical Frequency ◽  
Use Case ◽  
Mems Gyroscope ◽  
Active Devices ◽  
Voltage Imaging ◽  
Lock In

Abstract Lock-in techniques enable the detection of very small signals in a background that can be dominated by noise. This strength makes these techniques valuable especially for failure analysis of active devices where the deviation may be difficult to detect. This paper describes novel use case applications in which the lock-in amplifier plays a key role. The case studies covered are multi-frequency mapping fault isolation with nonperiodic patterns and frequency resonance measurement of a micro electro-mechanical system (MEMS) gyroscope. The paper presents how lock-in amplifiers enable digital failure analysis using compressed scan patterns. It reports on using a lock-in to characterize a MEMS gyroscope and on how to directly observe the gyroscope motion using phase laser voltage imaging/electro-optical frequency mapping. It can be concluded that the lock-in techniques form an essential part of the failure analysis toolkit and will only be more so with this study.

Use of Second Harmonic and Thermal Effects of Laser Voltage Probing for Better Fault Isolation

2016 ◽  
Author(s):  
Ramya Yeluri ◽  
Ravishankar Thirugnanasambandam ◽  
Cameron Wagner ◽  
Jonathan Urtecho ◽  
Jan M. Neirynck
Keyword(s):  
Duty Cycle ◽  
Thermal Effects ◽  
Second Harmonic ◽  
Fault Isolation ◽  
Advanced Technology ◽  
Temperature Dependent ◽  
First Case ◽  
Improve Accuracy ◽  
Degradation Monitoring ◽  
Technology Nodes

Abstract Laser voltage probing (LVP) has been extensively used for fault isolation over the last decade; however fault isolation in practice primarily relies on good-to-bad comparisons. In the case of complex logic failures at advanced technology nodes, understanding the components of the measured data can improve accuracy and speed of fault isolation. This work demonstrates the use of second harmonic and thermal effects of LVP to improve fault isolation with specific examples. In the first case, second harmonic frequency is used to identify duty cycle degradation. Monitoring the relative amplitude of the second harmonic helps identify minute deviations in the duty cycle with a scan over a region, as opposed to collecting multiple high resolution waveforms at each node. This can be used to identify timing degradation such as signal slope variation as well. In the second example, identifying abnormal data at the failing device as temperature dependent effect helps refine the fault isolation further.

Lock-in Thermography for Flip-Chip Package Failure Analysis

2012 ◽  
Author(s):  
Lihong Cao ◽  
Manasa Venkata ◽  
Jeffery Huynh ◽  
Joseph Tan ◽  
Meng-Yeow Tay ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Case Studies ◽  
Flip Chip ◽  
Organic Substrate ◽  
Fault Isolation ◽  
Lock In

Abstract This paper describes the application of lock-in thermography (LIT) for flip-chip package-level failure analysis. LIT successfully detected and localized short failures related to both die/C4 bumps and package defects inside the organic substrate. The detail sample preparation to create short defects at different layers, LIT fault isolation methodology, and case studies performed with LIT are also presented in this paper.

Laser Voltage Imaging and Its Derivatives—Efficient Techniques to Address Defect on 28 nm Technology

2013 ◽  
Author(s):  
Thierry Parrassin ◽  
Guillaume Celi ◽  
Sylvain Dudit ◽  
Michel Vallet ◽  
Antoine Reverdy ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Second Harmonic ◽  
Advanced Technology ◽  
Added Value ◽  
Harmonic Detection ◽  
Localization Technique ◽  
Voltage Imaging ◽  
Advanced Technologies ◽  
Defect Localization

Abstract The Laser Voltage Imaging (LVI) technique, introduced in 2007 [1][2], has been demonstrated as a successful defect localization technique to address problems on advanced technologies. In this paper, several 28nm case studies are described on which the LVI technique and its derivatives provide a real added value to the defect localization part of the Failure Analysis flow. We will show that LVI images can be used as a great reference to improve the CAD alignment overlay accuracy which is critical for advanced technology debug. Then, we will introduce several case studies on 28nm technology on which Thermal Frequency Imaging (TFI) and Second Harmonic Detection (two LVI derivative techniques) allow efficient defect localization.

Laser Voltage Imaging: New Perspective Using Second Harmonic Detection on Submicron Technology

2012 ◽  
Author(s):  
Guillaume Celi ◽  
Sylvain Dudit ◽  
Thierry Parrassin ◽  
Michel Vallet ◽  
Philippe Perdu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Case Studies ◽  
Second Harmonic ◽  
New Approach ◽  
Voltage Imaging ◽  
Signal Degradation ◽  
New Perspective ◽  
Process Issue ◽  
The Impact

Abstract The Laser Voltage Imaging (LVI) technique [1], introduced in 2009, appears as a very promising approach for Failure Analysis application which allows mapping frequencies through the backside of integrated circuits. In this paper, we propose a new range of application based on the study of the LVI second harmonic for signal degradation analysis. After a theoretical study of the impact of signal degradation on the second harmonic, we will demonstrate the interest of this new approach on two case studies on ultimate technology (28nm). This technique is a new approach of failure analysis that maps timing degradation and duty cycle degradation. In order to confirm the degradations we will use the LVP Technique. The last part is two real case studies on which this LVI second harmonic technique was used to find the root cause of a 28nm process issue.

Interpreting Laser-Based Fault Localization Results: Case Studies

2019 ◽  
Author(s):  
Sukho Lee ◽  
John van den Biggelaar ◽  
Marc van Veenhuizen
Keyword(s):  
Case Studies ◽  
Circuit Design ◽  
High Sensitivity ◽  
Failure Behavior ◽  
Process Technology ◽  
Resistance Change ◽  
Voltage Imaging ◽  
Root Cause ◽  
First Case ◽  
Proper Interpretation

Abstract Laser-based dynamic analysis has become a very important tool for analyzing advanced process technology and complex circuit design. Thus, many good reference papers discuss high resolution, high sensitivity, and useful applications. However, proper interpretation of the measurement is important as well to understand the failure behavior and find the root cause. This paper demonstrates this importance by describing two insightful case studies with unique observations from laser voltage imaging/laser voltage probing (LVP), optical beam induced resistance change, and soft defect localization (SDL) analysis, which required an in-depth interpretation of the failure analysis (FA) results. The first case is a sawtooth LVP signal induced by a metal short. The second case, a mismatched result between an LVP and SDL analysis, is a good case of unusual LVP data induced by a very sensitive response to laser light. The two cases provide a good reference on how to properly explain FA results.

Thermal Frequency Imaging: A New Application of Laser Voltage Imaging Applied on 40nm Technology

2011 ◽  
Author(s):  
Guillaume Celi ◽  
Sylvain Dudit ◽  
Thierry Parrassin ◽  
Philippe Perdu ◽  
Antoine Reverdy ◽  
...  
Keyword(s):  
Charge Carrier ◽  
Laser Beam ◽  
Integrated Circuit ◽  
Carrier Density ◽  
Deep Submicron ◽  
Charge Carrier Density ◽  
Voltage Imaging ◽  
A New Technique ◽  
Scan Chain

Abstract For Very Deep submicron Technologies, techniques based on the analysis of reflected laser beam properties are widely used. The Laser Voltage Imaging (LVI) technique, introduced in 2009, allows mapping frequencies through the backside of integrated circuit. In this paper, we propose a new technique based on the LVI technique to debug a scan chain related issue. We describe the method to use LVI, usually dedicated to frequency mapping of digital active parts, in a way that enables localization of resistive leakage. Origin of this signal is investigated on a 40nm case study. This signal can be properly understood when two different effects, charge carrier density variations (LVI) and thermo reflectance effect (Thermal Frequency Imaging, TFI), are taken into account.

Fault Isolation of Metal-Insulator-Metal (MiM) Capacitor Failures by Lock-in Thermography (LIT)

2020 ◽  
Author(s):  
Ke-Ying Lin ◽  
Pei-Fen Lue ◽  
Jayce Liu ◽  
Paul Kenneth Ang
Keyword(s):  
Fault Isolation ◽  
Phase Image ◽  
Metal Insulator ◽  
Amplitude Image ◽  
Metal Insulator Metal ◽  
Defect Localization ◽  
Lock In

Abstract The paper demonstrates accurate fault isolation information of metal-insulator-metal (MiM) capacitor failures by lock-in thermograph (LIT). In this study, a phase image spot location at a lock-in frequency larger than 5 Hz gives more accurate defect localization than an LIT amplitude image or OBIRCH to determine the next FA steps.

Electro-Optical Probing for Capturing Fast-to-Rise Scan Chain Failures

2021 ◽  
Author(s):  
Karl Villareal ◽  
Rommel Estores ◽  
Peter Baert
Keyword(s):  
Fault Isolation ◽  
Flip Flop ◽  
Diagnosis System ◽  
Chain Analysis ◽  
System 2 ◽  
Optical Probing ◽  
Scan Chain ◽  
Imaging Sensor ◽  
Chain Links ◽  
Long Chain

Abstract The paper discusses an imaging sensor exhibiting a fast-to-rise sanity check failure from a scan chain test. The DUT was prepared for backside analysis in a portable daughter-card [1] that enabled the analyst to easily shift between testing platforms such as a standard imaging tester bench and compact scan diagnosis system [2], while being inspected under the Electro-Optical Probing (EOP) machine. To find a failing flip-flop in several-thousands long chain, broken scan chain analysis was performed to narrow down the search to a few chain links was implemented. EOP methods of fault isolation were employed to verify the location of the broken scan cell in those selected flip-flops. Finally, parallel lapping was done to confirm the location of the failing flip-flop under a SEM.

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