Moisture Reliability Improvement of a High Performance Depletion Mode 0.15 um Gate PHEMT Process
Moisture reliability of a 0.15-um gate PHEMT technology for mm-wave applications was investigated. The PHEMT technology is fabricated with a deep UV optical lithography, and typically exhibits transconductance of ~550 mS/mm and fT of ~90 GHz. Moisture reliability, THBL or BHAST performed at 85% relative humidity, and 95 °C, or 130 °C and 85% RH, respectively, initially showed failures up to 70%, under various process splits. Extensive failure analysis pointed to a number of mechanisms contributing to failure, the key culprit being moisture ingress, enabled by poor quality of SiN, stresses, seams, and voids in the passivation dielectric around the gate topology. Moisture penetrated the SiN to GaAs surface through seams in the dielectric around the gate or regions of high local stress such as gate feeds and ends. A corrosion process ensued with the applied voltage bias on the device drain and gate during the THBL or BHAST environmental stress, leading to GaAs oxidation, metal migration and shorts. By designing the gate topology appropriately, failures were reduced to the range of 0–3.4 %. Further, using a BCB overcoat, failures were completely eliminated.