Failure Analysis and Reliability of 3D Integrated Systems

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 002071-002111
Author(s):  
Peter Ramm ◽  
Armin Klumpp ◽  
German Franz ◽  
Laurens Kwakman

Today 3D integration based on through silicon vias (TSV) is a well-accepted approach to overcome the performance bottleneck and simultaneously shrink the form factor. According to the ITRS road map [1] there is a variety of reasons for application of 3D integration, such as miniaturization, improved circuit performance, lower power consumption and heterogeneous integration. World-wide, several full 3D process flows have been demonstrated. However, there is a strong demand for considering the behaviour and reliability of 3D-integrated systems [2]. Explicitly, the impact of 3D processes on the system, e.g. thermo-mechanical stresses, has to be evaluated before the implementation to production lines. A test chip for reliability evaluation of 3D TSV technologies was designed and fabricated by Fraunhofer EMFT. The 3D-integrated reliability test chip is a 3-level-stack with TSVs through a middle (2nd) device layer to connect structures on the bottom (1st) level with the top (3rd) level device. The layout is modular, so you can test basic assembly processing with the combination of level 1 with level 2 only and the influence of additional processing when adding level 3. For reliability testing, temperature cycling following the JEDEC standard was performed from −55 C ° to +150 °C (at a soak time of 5 minutes). Additionally, analysis was done by cross sectioning and reversed engineering. The 3D-integrated test chips were fabricated by application of Fraunhofer EMFT's TSV SLID technology. The applied 3D TSV process is based on intermetallic compound (IMC) bonding and TSV formation before stacking [3]. Reliability issues related to thermo-mechanical stress caused by the 3D integration process have to be considered. Failures of 3D integrated systems caused by TSV formation and the permanent bonding process were analysed by a novel high rate milling Focussed Ion Beam equipment. Figure 1 schematically shows the application of the novel FIB analysis technique for the areas of interest (IMC bond, TSV cross sections). Compared to classical FIB systems, the new equipment allows to remove material significantly faster while maintaining good resolution at low beam currents, important for the subsequent analysis. Cross sections of the 3-layer stack are shown in Figure 2. The merits of the novel plasma FIB and the resulting failure analysis will be discussed in detail.

2009 ◽  
Vol 1215 ◽  
Author(s):  
Laurence Luneville ◽  
David Simeone ◽  
Gianguido Baldinozzi ◽  
Dominique Gosset ◽  
yves serruys

AbstractEven if the Binary Collision Approximation does not take into account relaxation processes at the end of the displacement cascade, the amount of displaced atoms calculated within this framework can be used to compare damages induced by different facilities like pressurized water reactors (PWR), fast breeder reactors (FBR), high temperature reactors (HTR) and ion beam facilities on a defined material. In this paper, a formalism is presented to evaluate the displacement cross-sections pointing out the effect of the anisotropy of nuclear reactions. From this formalism, the impact of fast neutrons (with a kinetic energy En superior to 1 MeV) is accurately described. This point allows calculating accurately the displacement per atom rates as well as primary and weighted recoil spectra. Such spectra provide useful information to select masses and energies of ions to perform realistic experiments in ion beam facilities.


1998 ◽  
Vol 4 (S2) ◽  
pp. 652-653 ◽  
Author(s):  
A. N. Campbell ◽  
J. M. Soden

A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.


2014 ◽  
Vol 20 (6) ◽  
pp. 1826-1834
Author(s):  
Enne Faber ◽  
Willem P. Vellinga ◽  
Jeff T.M. De Hosson

AbstractThis paper investigates the adhesive interface in a polymer/metal (polyethylene terephthalate/steel) laminate that is subjected to uniaxial strain. Cross-sections perpendicular to such interfaces were created with a focused ion beam and imaged with scanning electron microscopy during straining in the electron microscope. During in situ straining, glide steps formed by the steel caused traction at the interface and initiated crazes in the polyethylene terephthalate (PET). These crazes readily propagated along the free surface of the PET layer. Similar crazing has not been previously encountered in laminates that were pre-strained or in numerical calculations. The impact of focused ion beam treatments on mechanical properties of the polymer/metal laminate system was therefore investigated. It was found that mechanical properties such as toughness of PET are dramatically influenced by focused ion beam etching. It was also found that this change in mechanical properties has a different effect on the pre-strained and in situ strained samples.


Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.


Author(s):  
Lihong Cao ◽  
Loc Tran ◽  
Wallace Donna

Abstract This article describes how Focused Ion Beam (FIB) milling methodology enhances the capability of package-level failure analysis on flip-chip packages by eliminating the artifacts induced by using conventional mechanical techniques. Dual- Beam Focused Ion Beam (DB FIB) cross sections were successful in detecting failure mechanisms related either to the die/C4 bump or package defect inside the organic substrate. This paper outlines detailed sample preparation techniques prior to performing the DB FIB cross-sections, along with case studies of DB FIB cross-sections.


Author(s):  
Konrad Jarausch ◽  
John F. Richards ◽  
Lloyd Denney ◽  
Alex Guichard ◽  
Phillip E. Russell

Abstract Advances in semiconductor technology are driving the need for new metrology and failure analysis techniques. Failures due to missing, or misregistered implants are particularly difficult to resolve. Two-dimensional implant profiling techniques such as scanning capacitance microscopy (SCM) rely on polish preparation, which makes reliably targeting sub 0.25 um structures nearly impossible.[1] Focused ion beam (FIB) machining is routinely used to prepare site-specific cross-sections for electron microscopy inspection; however, FIB induced artifacts such as surface amorphization and Ga ion implantation render the surface incompatible with SCM (and selective etching techniques). This work describes a novel combination of FIB machining and polish preparation that allows for site-specific implant profiling using SCM.


2000 ◽  
Vol 612 ◽  
Author(s):  
T. Berger ◽  
L. Arnaud ◽  
R. Gonella ◽  
I. Touet ◽  
G. Lormand

AbstractWe have studied the effect of texture (X-ray diffraction pole figures) and grain morphology (Focus Ion Beam cross-sections) on the electromigration performances of copper damascene interconnects. Three different metallizations have been characterized : Chemical Vapor Deposition copper deposited on TiN (process A) and electroplated copper deposited either on Ta (process B) or TaN (process C). The reliability performance of these interconnects has been evaluated using both Wafer Level Reliability (WLR) and Package Level Reliability (PLR) tests on 4 and 0.6 νm wide lines using single metal level test structures. On the basis of the activation energy values and failure analysis observations, we concluded that interfacial diffusion plays a key role in the electromigration phenomenon for processes B and C whereas grain boundaries seem to be the active diffusion path for process A. The existence of several failure mechanisms during electromigration tests (interfacial or grain boundary diffusions), the impact of the damascene architecture on microstructure (sidewall textures and non columnar grain shapes) and the copper propensity for twinning seem to mask the impact of texture on the electromigration reliability of copper damascene interconnects.


2001 ◽  
Vol 7 (S2) ◽  
pp. 514-515 ◽  
Author(s):  
Larry Rice

Electron beam induced current (EBIC) is the common term used in the semiconductor industry for the failure analysis and yield enhancement of semiconductor devices using SEM to electrically pinpoint leakage sites. EBIC is a useful technique for locating defects in diodes, transistors, and capacitors where the scanning electron microscope beam is used to generate a signal and the sample is the detector. Often during yield enhancement efforts the failure analyst is asked to determine the mechanism for which a PC structure (which may contain as many as a few hundred thousand structures in one device) is failing tests. Blind cross sections rarely give evidence of the failure mechanism. EBIC can be used to pinpoint the bad site which is then precision cross-sectioned using the focused ion beam (FIB).When an electron beam impinges on a semiconductor such as silicon, electron-hole pairs are created when the incident beam transfers enough energy to promote an electron from the valance band to the conduction band.


2022 ◽  
Vol 12 (1) ◽  
Author(s):  
Katharina Müller ◽  
Zita Szikszai ◽  
Ákos Csepregi ◽  
Róbert Huszánk ◽  
Zsófia Kertész ◽  
...  

AbstractIon beam analysis plays an important role in cultural heritage (CH) studies as it offers a combination of simultaneous and complementary analytical techniques (PIXE/PIGE/RBS) and spatially resolved mapping functions. Despite being considered non-destructive, the potential risk of beam-induced modifications during analysis is increasingly discussed. This work focuses on the impact of proton beams on parchment, present in our CH in form of unique historical manuscripts. Parchment is one of the organic, protein-based CH materials believed to be the most susceptible to radiation-induced changes. Various modification patterns, observed on parchment cross-sections by optical and electron microscopy are reported: discoloration (yellowing), formation of cavities and denaturation of collagen fibers. Considerable modifications were detected up to 100 µm deep into the sample for beam fluences of 4 µC/cm2 and higher. The presence of ultramarine paint on the parchment surface appears to increase the harmful effects of proton radiation. Based on our results, a maximum radiation dose of 0.5 µC/cm2 can be considered as ‘safe boundary’ for 2.3 MeV PIXE analysis of parchment under the applied conditions.


Author(s):  
W. Mack ◽  
B. Seidl ◽  
R. Fischer ◽  
T. Ort ◽  
J. Walter ◽  
...  

Abstract Microstructural diagnostics for electronic packaging development and failure analysis under industrial manufacturing conditions require fast but reliable preparation routines which result in samples of high quality without preparation artefacts. The aim of the presented paper is to introduce a time- and cost efficient ion beam-based preparation procedure for high resolution Field Emission- Scanning Electron Microscopy (FESEM) analysis for packaging components. In particular, the considerable advantages of the proposed method compared to standard metallographic approaches will be demonstrated by discussing results of typical failure analysis examples as a function of the preparation procedure.


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